This invention relates to semiconductor memory devices and more particularly to a static memory cell made of MOS transistors.
The most widely used semiconductor memory devices at present are one-transistor dynamic memory cells as described in U.S. Pat. 3,940,747, issued Feb. 24, 1976 to Kuo and Kitagawa, assigned to Texas Instruments. Higher density versions of these dynamic memory systems are shown in Electronics, May 13, 1976, pp. 81-86 and U.S. patent application Ser. No. 691,734, filed June 1, 1976 by Lionel White and N. Kitagawa, assigned to Texas Instruments. These high density devices use one-transistor dynamic memory cells which have the advantage of very small size, but require sense amplifiers capable of distinguishing a few hundred millivolts, and dissipate considerable power in large arrays; primarily, however, dynamic memories suffer from the disadvantage of requiring external refresh systems. The arrays must be addressed periodically to restore the data, since the stored voltages will leak off the capacitors in the memory cells, imposing both time and hardware burdens on the system. Static memory cells of the type set forth in copending application Ser. No. 691,252, filed May 28, 1976, by G. R. Mohan Rao, assigned to Texas Instruments, avoid the need for refresh, but at the expense of larger cell size and increased power dissipation. Various types of "self-refreshing" cells have been proposed, one example of which is shown in Digest of Technical Papers, 1976 IEEE Solid State Circuits Conference, p. 132, on Automatic Refresh Dynamic Memory. Another is shown in U.S. Pat No. 3,955,181, issued May 4, 1976 to Joseph H. Raymond, Jr., for Self-Refreshing Random Access Memory Cell, assigned to Texas Instruments. A self-refresh RAM cell of very simple construction is shown in pending U.S. patent application Ser. No. 700,989, filed June 29, 1976, by G. R. Mohan Rao, David J. McElroy and Gerald D. Rogers, assigned to Texas Instruments. These prior cells provide apparently static operation in that refresh is accomplished without addressing the cells. Prior self-refresh cells, however, have exhibited either large cell size or excessive power dissipation, neither of which is compatible with high density memories of the 4 K or 16 K variety. Others have required clocking or other timing signals, or have exhibited a high degree of process dependence on Vt or other parameters, i.e. low yield.
It is a principal object of this invention to provide improved memory cells in semiconductor integrated circuits. Another object is to provide an improved static cell for MOS memory devices, particularly a static cell of small size and not requiring clock inputs. An additional object is to provide small area, self-refreshing memory elements in semiconductor integrated circuits, particularly with low power dissipation and made by processes compatible with MOS/LSI standard products.